Call for Papers
The International Symposium on Asynchronous Circuits and Systems (ASYNC) is the premier forum for researchers and Industry to present their latest insights and results in asynchronous VLSI computing. Asynchronous VLSI computations are at the heart of recent deep learning and neuromorphic designs, and well-suited for distributed tasks in fast or low-energy processing and communication.
We invite you to submit a 6-8 page regular paper with original scientific work relevant to ASYNC, in IEEE conference format (double-column, 10pt or larger, at most 250-word abstract). Author information must be omitted from reviewers. Accepted papers must be presented and will be published in the Symposium Proceedings and the IEEE Xplore Digital Library.
We also encourage you to submit 1-2 page papers for demo-poster-ideas with a demo or poster abstract or with "fresh ideas" to try out live. These go through a light-weight review. Accepted papers must be presented and will be distributed as handouts at the Symposium.
We solicit 1-2 page papers from Industry on state-of-the-art integration of asynchronous designs to existing or emerging technologies. These must follow the format of a regular paper, but will go through a separate light-weight review process. Accepted papers must be presented and will be published in the Symposium Proceedings and the IEEE Xplore Digital Library.
Submission of papers
Please submit your papers to the following web site, for review:
|Regular Papers||Industrial papers, Fresh ideas papers, Posters, Tool & Demos|
|Abstract Registration||7 December 2018||-|
|Paper Submission||14 December 2018||28 February 2019|
|Notification Acceptance||30 January 2019||15 March 2019|
|Publication Ready Version Submission||8 March 2019||29 March 2019|